It turns out that only starting with GCC 13, a test-and-set of the most significant bit actually works efficiently in srw_lock.cc. Any version of clang would still emit a loop around lock cmpxchg.

This can be worked around by moving the HOLDER flag from the most significant to the least significant end of the lock word; then it will work starting with clang 15 and GCC 7.

Note: Switching from uint32_t to int32_t is not an option, because then it would be UB to toggle the most significant bit of the lock word in some std::atomic::fetch_add() operations, which is what the code is doing elsewhere.

I posted two https://godbolt.org links to https://github.com/MariaDB/server/pull/3542 that show which instructions are being generated.

On POWER, s390x and generic ARM, all atomic operations use something similar to the x86 loops around lock cmpxchg, namely loops around load-locked/store-conditional.

Side note (not affected by these changes): The Large System Extensions that would be enabled by -march=armv8.1-a include one atomic instruction ldadd for fetch_add() and fetch_sub() (similar to the 80486 lock xadd and further instructions for atomic bitwise operations that can operate with arbitrary arguments and return the full original content. It could make sense to some runtime detection and target specific code for the InnoDB synchronization primitives, to reduce the overhead compared to -moutline-atomics.