[MDEV-28836] Correcting the cache alignment for Table_cache_instance. Created: 2022-06-14  Updated: 2023-11-08  Resolved: 2022-06-21

Status: Closed
Project: MariaDB Server
Component/s: Server
Affects Version/s: 10.8, 10.9, 10.10
Fix Version/s: 10.6.9, 10.7.5, 10.8.4, 10.9.2, 10.10.1

Type: Bug Priority: Minor
Reporter: Krunal Bauskar Assignee: Marko Mäkelä
Resolution: Fixed Votes: 0
Labels: performance

Attachments: PNG File effect.with4numa.nodes.png    
Issue Links:
Problem/Incident
causes MDEV-29308 10.8.4 fails to build on OpenBSD Closed

 Description   

Correcting the cache alignment for Table_cache_instance.

  • Size of Table_cache_instance is 224 (64 bits processor)
  • To avoid cache sharing padding of cacheline size was added.
    This padding fails to generate closet possible alignment
    and infact causes bloating with size = 352 (128 bytes cacheline)
  • Proposed patch ensure that structure is cache aligned.
    (will submit the patch through github).

-----------
With patch a marginal improvement is seen with multi-numa nodes though not significant to classify this as performance issue.

 Comments   
Comment by Krunal Bauskar [ 2022-06-15 ]

reduction in Lock_table_cache contention with the patch

without patch:

wait/synch/mutex/sql/LOCK_table_cache 333452.0811 259553191

with patch:

wait/synch/mutex/sql/LOCK_table_cache 212476.5164 259676376

slight performance improvement was observed with 4 numa nodes. (check the attached graph)

Comment by Marko Mäkelä [ 2022-06-15 ]

We assume at compilation time that the cache line size is 128 bytes on ARMv8 and POWER. On IBM s390 and s390x it is 256 bytes, and on x86 and AMD64 64 bytes.

The suggested change would also reduce the memory footprint, because the padding between objects would be reduced.

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