When MDEV-22669 introduced CRC-32C acceleration to IA-32, it worked around a bug of GCC 4 by disabling the acceleration for IA-32. The bug only affects the generating of position independent code (-fPIC):

/home/buildbot/buildbot/build/storage/innobase/ut/ut0crc32.cc: In function 'void ut_crc32_init()':

/home/buildbot/buildbot/build/storage/innobase/ut/ut0crc32.cc:120:50: error: PIC register clobbered by 'ebx' in 'asm'

   asm("cpuid" : "=c"(i) : "ax"(1) : "ebx", "edx");

In MDEV-23585 I found a more elegant solution to this problem: implement a CMake check for that the cpuid instruction.
We can extend this check so that the source code can simply refer to HAVE_CPUID_INSTRUCTION. In that way, only those platforms that are affected by the compiler bug will avoid using any instruction set extensions.

Clarification: We always generated the CPUID instruction for AMD64. We only unnecessarily disabled it on IA-32 in some cases. I do not know whether and how the code could be compiled without -fPIC.